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TB62726N/F
TOSHIBA Bi-CMOS Integrated Circuit Silicon Monolithic
TB62726N, TB62726F
16-bit Constant-Current LED Driver with Operating Voltage of 3.3 V
The TB62726 series is comprised of constant-current drivers designed for LEDs and LED displays. The output current value can be set using an external resistor. As a result, all outputs will have virtually the same current levels. This driver incorporates a 16-bit constant-current output, a 16-bit shift register, a 16-bit latch and a gate circuit. These drivers have been designed using the Bi-CMOS process.
TB62726N
Features
* * * Output current capability and number of outputs: Constant current range: 2~80 mA Application output voltage: 0.7 V (output current 2~80 mA) 0.4 V (output current 2~40 mA) * * * * * * For anode-common LEDs Input signal voltage level: 3.3-V CMOS level (Schmitt trigger input) Maximum output terminal voltage: 17 V Serial data transfer rate: 20 MHz (max, cascade connection) Operating temperature range Topr = -40~85C Package: Type N: SDIP24-P-300-1.78 Type F: SSOP24-P-300-1.00B * * Package and pin layout: Pin layout and functionality are similar to those of the TB62706. (Each characteristic value is different.) Constant-current accuracy (all outputs on)
Output voltage > 0.7 V = Current accuracy between bits 4% between ICs 15% 12% Output current 2~5 mA 5~80 mA TB62726F
90 mA x 16 outputs
Weight SDIP24-P-300-1.78: 1.22 g (Typ.) SSOP24-P-300-1.00B: 0.32 g (Typ.)
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TB62726N/F
Pin Assignment (top view)
Pin layout and functionality are similar to those of the TB62706. (each characteristic value is different.)
GND SERIAL-IN CLOCK LATCH OUT0 OUT1
OUT2 OUT3 OUT4 OUT5 OUT6 OUT7
VDD R-EXT SERIAL-OUT ENABLE OUT15 OUT14 OUT13 OUT12 OUT11 OUT10 OUT9 OUT8
Block Diagram
OUT0
OUT1
OUT15
R-EXT
I-REG
ENABLE
Q ST
LATCH
Q D ST D ST
Q D
SERIAL-IN
D CK
Q
D CK
Q
D CK
Q
SERIAL-OUT
CLOCK
Truth Table
CLOCK
LATCH
ENABLE
SERIAL-IN Dn Dn + 1 Dn + 2 Dn + 3 Dn + 3
OUT0 ... OUT7 ... OUT15
SERIAL-OUT Dn - 15 Dn - 14 Dn - 13 Dn - 13 Dn - 13
H L H X X
L L L L H
Dn ... Dn - 7 ... Dn - 15 No Change Dn + 2 ... Dn - 5 ... Dn - 13 Dn + 2 ... Dn - 5 ... Dn - 13 OFF
Note 1:
OUT0 ~ OUT15 = ON when Dn = "H"; OUT0 ~ OUT15 = OFF when Dn = "L". In order to ensure that the level of the power supply voltate is correct, an external resistor must be connected between R-EXT and GND.
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TB62726N/F
Timing Diagram
n=0 CLOCK 0V 5V SERIAL-IN 0V 5V
LATCH
1
2
3
4
5
6
7
8
9
10 11 12 13 14 15
5V
0V
ENABLE
5V 0V ON
OUT0
OFF ON
OUT1
OFF ON OUT3 OFF
ON
OUT15
OFF 5V SERIAL-OUT 0V
Warning: Latch circuit is leveled-latch circuit. Be careful because it is not triggered-latch circuit. Note 2: The latches circuit holds data by pulling the LATCH terminal Low. And, when LATCH terminal is a "H" level, latch circuit doesn't hold data, and it passes from the input to the output. When ENABLE terminal is a "L" level, output terminal OUT0 ~ OUT15 respond to the data, and on & off does. And, when ENABLE terminal is a "H" level, it offs with the output terminal regardless of the data.
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TB62726N/F
Terminal Description
Pin No. 1 2 3 4 5~20 Pin Name GND SERIAL-IN CLOCK
LATCH
Function GND terminal for control logic Input terminal for serial data for data shift register Input terminal for clock for data shift on rising edge Input terminal for data strobe When the LATCH input is driven High, data is latched. When it is pulled Low, data is hold.
OUT0 ~ OUT15
Constant-current output terminals Input terminal for output enable.
21
ENABLE
All outputs ( OUT0 ~ OUT15 ) are turned off, when the ENABLE terminal is driven High. And are turned on, when the terminal is driven Low.
22 23 24
SERIAL-OUT R-EXT VDD
Output terminal for serial data input on SERIAL-IN terminal Input terminal used to connect an external resistor. This regulated the output current. 3.3-V supply voltage terminal
Equivalent Circuits for Inputs and Outputs
ENABLE terminal
R (UP) VDD
230 k9
LATCH terminal
VDD 100 W
230 k9
ENABLE
100 W
LATCH
GND
GND R (DOWN)
CLOCK, SERIAL-IN terminal
VDD
SERIAL-OUT terminal
VDD
CLOCK, SERIAL-IN
100 W GND
100 W
SERIAL-OUT
GND
OUT0 ~ OUT15 terminals
OUT0 ~ OUT15 Parasitic Diode GND
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TB62726N/F
Maximum Ratings (Topr = 25C)
Characteristics Supply voltage Input voltage Output current Output voltage N-type (when not mounted) Power Dissipation N-type (on PCB) Symbol VDD VIN IOUT VOUT Pd1 1.78 W 0.83 Pd2 1.00 104 Rth (j-a) 1 70 C/W 140 Rth (j-a) 2 120 Topr Tstg
-40~85 -55~150
Rating 6
-0.2~VDD + 0.2 +90 -0.2~17
Unit V V mA/ch V
1.25
(Note 3) F-type (when not mounted) F-type (On PCB) N-type (when not mounted) Thermal Resistance N-type (on PCB)
(Note 3) F-type (when not mounted) F-type (On PCB) Operating Temperature Storage Temperature
C C
Note 3: N-Type: Powes dissipation is derated by 14.2 mW/C if device is mounted on PCB and ambient temperature is above 25C. F-Type: Powes dissipation is derated by 8.3 mW/C if device is mounted on PCB and ambient temperature is above 25C. With device mounted on glass-epoxy PCB of less than 40% Cu and of dimensions 50 mm 50 mm 1.6 mm.
Recommended Operating Conditions (Topr = -40C ~85C unless otherwise specified)
Characteristics Supply voltage Output voltage Symbol VDD VOUT IOUT Output current IOH IOL VIH Input voltage VIL Clock frequency
LATCH pulse width ENABLE pulse width
Conditions
3/4 3/4
Min 3
3/4
Typ. 3.3 0.7
3/4 3/4 3/4 3/4 3/4 3/4 3/4 3/4 3/4 3/4 3/4 3/4 3/4
Max 3.6 4 80
-1
Unit V V mA/ch mA
Each DC 1 circuit SERIAL-OUT SERIAL-OUT
2
3/4 3/4
1 VDD + 0.15 0.3 VDD 20
3/4 3/4 3/4 3/4 3/4 3/4 3/4
3/4
0.7 VDD
-0.15
V
fCLK twLAT twENA twCLK tSETUP1 tHOLD tSETUP2
Cascade Connected
3/4
3/4
MHz ns
ms
50 2 3 25
IOUT > 20 mA = IOUT < 20 mA =
(Note 4) CLOCK pulse width Set-up time for CLOCK terminal Hold time for CLOCK terminal Set-up time for LATCH terminal
3/4
5 10 50
ns
Note 4: When the pulse of the "L" level is inputted to the ENABLE terminal held in the "H" level.
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TB62726N/F
Electrical Characteristics (Topr = 25C, VDD = 3.3 V unless otherwise specified)
Characteristics Supply voltage Symbol VDD IOUT1 Output current IOUT2
DIOUT1 DIOUT2 3/4 3/4 3/4 3/4 3/4 3/4 3/4 3/4 3/4 3/4 3/4 3/4 3/4 3/4 3/4
Test Circuit
3/4 3/4
Conditions Normal operation VOUT = 0.4 V VOUT = 0.7 V VOUT > 0.4 V, = All outputs ON
> VOUT = 0.7 V, All outputs ON
Min 3.0 REXT = 490 W REXT = 250 W REXT = 490 W REXT = 250 W 32.3 60.4
3/4 3/4 3/4
Typ. 3.3 36.7 68.6
1 1 3/4 3/4 3/4 3/4 3/4 -1
Max 3.6 41.1
Unit V
mA 76.8
4
Output current Error between bits
%
4
Output leakage current
IOZ VIH
VOUT = 15.0 V
3/4 3/4
1 VDD
mA
Input voltage VIL SOUT terminal Output voltage Output current Supply voltage Regulation Pull-up resistor Pull-down resistor VOH VOL %/VDD R (Up) R (Down) IDD (OFF) 1 IDD (OFF) 2 IDD (OFF) 3 Supply current IDD (ON) 1
3/4 3/4
0.7 VDD GND
3/4
V 0.3 VDD 0.3
3/4 -2
IOH = 1.0 mA IOL = -1.0 mA VDD = 3 V (R) 3.6 V
ENABLE terminal LATCH terminal
V
3
3/4
%
115 115 REXT = OPEN REXT = 490 W REXT = 250 W REXT = 490 W
3/4
230 230 0.1 3.5 6 9
3/4
460 460 0.5 5 9 15 20 25 40
kW
VOUT = 15.0 V VOUT = 15.0 V, All outpus OFF VOUT = 15.0 V, All outpus OFF VOUT = 0.7 V, All outpus ON Same as the above, Topr = -40C VOUT = 0.7 V, All outpus ON Same as the above, Topr = -40C
1 4
3/4 3/4
mA
IDD (ON) 2
3/4
REXT = 250 W
3/4 3/4
18
3/4
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TB62726N/F
Switching Characteristics (Topr = 25C unless otherwise specifed)
Characteristics Symbol tpLH1 Test circuit
3/4
Conditions CLK- OUTn , LATCH = "H",
ENABLE = "L" LATCH - OUTn , ENABLE = "L" ENABLE - OUTn , LATCH = "H"
Min
3/4
Typ. 150
Max 300
Unit
tpLH2
3/4
3/4
150
300
tpLH3 tpLH tpHL1
3/4 3/4 3/4
3/4
150 6 120
300
3/4
Propagation delay time
CLK-SERIAL OUT CLK- OUTn , LATCH = "H",
ENABLE = "L" LATCH - OUTn , ENABLE = "L" ENABLE - OUTn , LATCH = "H"
3
3/4
ns
260
tpHL2
3/4
3/4
120
260
tpHL3 tpHL Output rise time Output fall time Maximum CLOCK rise time Maximum CLOCK fall time tor tof tr tf
3/4 3/4 3/4 3/4 3/4 3/4
3/4
120 7 40 40
3/4 3/4
260
3/4
CLK-SERIAL OUT 10~90% of voltage waveform 90~10% of voltage waveform Cascade connection isn't guarantee. (Note 5)
4 20 20
3/4 3/4
100 100 5 5
ns ns
ms ms
Conditions: (Refer to test circuit.) Topr = 25C, VDD = VIH = 3.3 V, VOUT = 0.7 V, VIL = 0 V, REXT = 490 W, IOUT = 37.5 mA, VL = 3.0 V, RL = 60 W, CL = 10.5 pF Note 5: If the device is connected in a cascade and tr/tf for the waveform is large, it may not be possible to achieve the timing required for data transfer. Please consider the timings carefully.
Test Circuit
IDD
VIH, VIL
ENABLE
VDD
RL OUT0 CL
Function generator
CLOCK IOL
LATCH
OUT15
SERIAL-IN SERIAL-OUT R-EXT Logic input waveform GND CL Iref VL
VDD = VIH = 3.3 V VIL = 0 V tr = tf = 10 ns (10% to 90%)
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TB62726N/F
Timing Waveforms
1. CLOCK, SERIAL-IN, SERIAL-OUT
twCLK CLOCK 50% tSETUP1 SERIAL-IN 50% tHOLD SERIAL-OUT 50% tpLH/tpHL 50% 50%
2. CLOCK, SERIAL-IN, LATCH , ENABLE , OUTn
CLOCK
50%
SERIAL-IN tSETUP2
LATCH
50% twLAT
50% twENA 50% 50%
ENABLE
tSETUP3
OUTn tpHL1/LH1 tpHL2/LH2
50%
tpHL3/LH3
3. OUTn
90% OUTn 10% tof 10% tor ON 90% OFF
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TB62726N/F
Output Curent - Duty (LED turn-on rate)
IOUT - DUTY On PCB
100 100
IOUT - DUTY On PCB
80
80
(mA)
60
(mA) IOUT
Topr = 25C
60
IOUT
40
40 Topr = 55C 20
20
VDD = 3.3 V VCE = 1.0 V Tj = 120C (max)
TB62726F TB62726N 40 60 80 100 0 0
VDD = 3.3 V VCE = 1.0 V Tj = 120C (max) 20 40 60
TB62726F TB62726N 80 100
0 0
20
DUTY - Turn ON Rate
(%)
DUTY - Turn ON Rate
(%)
IOUT - DUTY On PCB
100 2.0 1.8 80 1.6 1.4 N (ON PCB)
Pd - Topr
(mA)
60
Pd (W/IC)
1.2 F (ON PCB) 1.0 0.8 0.6 0.4
IOUT
40 Topr = 85C 20 VDD = 3.3 V VCE = 1.0 V Tj = 120C (max) 0 0 20 40 60 TB62726F
0.2 TB62726N 80 100 0 0 20 40 60 80 100 120 140 160
DUTY - Turn ON Rate
(%)
Topr
(C)
Output Current - REXT Resistor
IOUT - REXT
90 IOUT (mA) = (1.15 REXT (W)) 14.9 80 70 60
(mA) IOUT
50 40 Topr = 25C 30 20 10 0 100 VDD = 3.3 V VCE = 0.7 V 500 1000 5000 10000
REXT
(9)
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TB62726N/F
Application Notes (example 1)
It is recommended that TB62726 Series recommend device be used in a cascade connection with VLED = VDD = 3.3 V and a data transfer rate fclk = 20 (MHz)
(1) (2) (3) (4)
Example: TD62M8600F 8-bit multi-chip PNP transistor array, which is not used in static lighting system.
Vf of LED is Vf = 2.5 V (max). Output saturation Vce1 = 0.4 V (min) at TB62726 Iout < 40 mA = Output saturation Vce2 = 0.25 V (max) at TD62M8600F Ic = -1 A TB62726 can operate with VDDopr = 3.3 V 0.3 V
VLED
SCAN O0
O1 O13 O14 O15
O2
O0
O1
O2
O13 O14 O15
SERIAL-IN 16-Bit SIPO. Latches and Constant-Sink-Current Drivers
C.U. TB62726N/F
ENABLE
SERIAL-IN SERIAL-OUT ENABLE
LATCH
16-Bit SIPO. Latches and Constant-Sink-Current Drivers
SERIAL-OUT
LATCH
CLOCK
CLOCK
TB62726N/F
r2
r > 100 W =
r1 > 100 W =
r1: Resistance for setting up output current r2: Resistance for LED module brightness adjustment
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TB62726N/F
Application Notes (example 2)
TB62726N/F application circuit (for VLED > 17 V)
Example: An unnecessary voltage in the case of VLED > 17 V makes a voltage descend by the Zener diode.
Example: TD62M8600F 8-bit multi-chip PNP transistor array, which is not used in static lighting system.
VLED > 17 V
SCAN O0
O1 O13 O14 O15
O2
O0
O1
O2
O13 O14 O15
SERIAL-IN 16-Bit SIPO. Latches and Constant-Sink-Current Drivers
C.U. TB62726N/F
ENABLE
SERIAL-IN SERIAL-OUT ENABLE
LATCH
16-Bit SIPO. Latches and Constant-Sink-Current Drivers
SERIAL-OUT
LATCH
CLOCK
CLOCK
TB62726N/F
r1 r1
r2
r1: Resistance for setting up output current r2: Resistance for LED module brightness adjustment
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TB62726N/F
Application Notes (example 3)
< TB62726N/F application circuit (with VLED = 17 V, the case of the over-saturation)
Example: An over-saturation voltage makes a voltage descend by the resistance with the outside. Conditions: (1) LED is turned on when IOUT = 20 mA. (2) LED of Vf = 2.5 V (max). (3) Saturation voltage = 0.4 V (min) at IC = 20 mA of TB62725 (4) Saturation voltage = 0.25 V (min) at IC = 320 mA of TD62M8600F Connect R1 and reduce the heat loss in the IC. r3 = (15 - 0.4 - LED Vf*1 - 0.25) /20 mA = 592.5 W
r1: Resistance for setting up output current r2: Resistance for LED module brightness adjustment Example: TD62M8600F 8-bit multi-chip PNP transistor array, which is not used in static lighting system.
r3
r3
VLED = 15 V
SCAN O0
O1 O13 O14 O15
O2
O0
O1
O2
O13 O14 O15
SERIAL-IN 16-Bit SIPO. Latches and Constant-Sink-Current Drivers
C.U. TB62726N/F
ENABLE
SERIAL-IN SERIAL-OUT ENABLE
LATCH
16-Bit SIPO. Latches and Constant-Sink-Current Drivers
SERIAL-OUT
LATCH
CLOCK
CLOCK
TB62726N/F
r1 r1
r2
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TB62726N/F
Notes
* Operation may become unstable due to the electromagnetic interference caused by the wiring and other phenomena. To counter this, it is recommended that the IC be situated as close as possible to the LED module. If overvoltage is caused by inductance between the LED and the output terminals, both the LED and the terminals may suffer damage as a result. There is only one GND terminal on this device when the inductance in the GND line and the resistor are large, the device may malfunction due to the GND noise when output switchings by the circuit board pattern and wiring. To achieve stable operation, it is necessary to connect a resistor between the REXT terminal and the GND line. Fluctuation in the output waveform is likely to occur when the GND line is unstable or when a capacitor (of more than 50 pF) is used. Therefore, take care when designing the circuit board pattern layout and the wiring from the controller. This application circuit is a reference example and is not guaranteed to work in all conditions. Be sure to check the operation of your circuits. This device does not include protection circuits for overvoltage, overcurrent or overtemperature. If protection is necessary, it must be incorporated into the control circuitry. The device is likely to be destroyed if a short-circuit occurs between either of the power supply pins and any of the output terminals when designing circuits, pay special attention to the positions of the output terminals and the power supply terminals (VDD and VLED), and to the design of the GND line.
*
*
*
*
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TB62726N/F
Package Dimensions
Weight: 1.22 g (typ.)
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TB62726N/F
Package Dimensions
Weight: 0.32 g (typ.)
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TB62726N/F
RESTRICTIONS ON PRODUCT USE
000707EBA
* TOSHIBA is continually working to improve the quality and reliability of its products. Nevertheless, semiconductor devices in general can malfunction or fail due to their inherent electrical sensitivity and vulnerability to physical stress. It is the responsibility of the buyer, when utilizing TOSHIBA products, to comply with the standards of safety in making a safe design for the entire system, and to avoid situations in which a malfunction or failure of such TOSHIBA products could cause loss of human life, bodily injury or damage to property. In developing your designs, please ensure that TOSHIBA products are used within specified operating ranges as set forth in the most recent TOSHIBA products specifications. Also, please keep in mind the precautions and conditions set forth in the "Handling Guide for Semiconductor Devices," or "TOSHIBA Semiconductor Reliability Handbook" etc.. * The TOSHIBA products listed in this document are intended for usage in general electronics applications (computer, personal equipment, office equipment, measuring equipment, industrial robotics, domestic appliances, etc.). These TOSHIBA products are neither intended nor warranted for usage in equipment that requires extraordinarily high quality and/or reliability or a malfunction or failure of which may cause loss of human life or bodily injury ("Unintended Usage"). Unintended Usage include atomic energy control instruments, airplane or spaceship instruments, transportation instruments, traffic signal instruments, combustion control instruments, medical instruments, all types of safety devices, etc.. Unintended Usage of TOSHIBA products listed in this document shall be made at the customer's own risk. * The products described in this document are subject to the foreign exchange and foreign trade laws. * The information contained herein is presented only as a guide for the applications of our products. No responsibility is assumed by TOSHIBA CORPORATION for any infringements of intellectual property or other rights of the third parties which may result from its use. No license is granted by implication or otherwise under any intellectual property or other rights of TOSHIBA CORPORATION or others. * The information contained herein is subject to change without notice.
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